DDR PHY & ControllerInterface Controller & PHY
Download Product Overview
Dolphin Technology provides hardened DDR PHY IP which operates at maximum speeds and is fully compliant with the DFI 4.0 specification.
Features include slew rate control, per-bit de-skew, gate training, read and write leveling and built-in self test (BIST).
We also provide a complete DDR Memory Controller solution.
Dolphin Technology offers a high performance DDRx/LPDDRx DRAM memory controller solution that is optimized to provide a complete solution along with our DDR PHY IP.
Our controllers are DFI 4.0 compliant and are fully configurable, ensuring maximum performance across different system environments.
Dolphin Technology delivers custom, synthesizable IP to support specific design requirements. The DTI EMMC controller provides the logic to integrate a Host and PHY controller supporting embedded MultiMediaCard (eMMC) version 5.1 into any system on chip (SoC).
DTI SD host controller facilitates host equipment to communicate with SD card. It supports both legacy and ultra-high speed II (UHS-II) interfaces.
DTI I2C controller provides the logic consistent with NXP I2C specification to support the communication of low-speed integrated circuits through I2C bus.
The IP facilitates software controllable by application processor through industry-standard AMBA interface. The bus interface is flexible and easily integrated into APB, AHB or AXI system bus.
DTI I2S controller provides interface between system bus and Inter-IC Sound devices. The controller is compliant with Philips Inter-IC Sound Bus Specification and AMBA APB Specification. Other buses such as AXI-Lite, AHB-Lite, OCP, and etc are optional supports.