Products
Memory
TSMC
45 nm
GS
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
LP
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
Test Chip Status
65 nm
GP
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
LP
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
Test Chip Status
90 nm
G
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
GT
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
LP
SRAM
High Perf/Density
Ultra Low Leak
Register File
Specialty Memory
ROM
CAM
Test Chip Status
0.13 µ
G
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
LV
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
LVOD
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
Test Chip Status
0.18 µ
G
SRAM
High Perf/Density
Register File
CAM
LV
SRAM
High Perf/Density
Register File
CAM
Test Chip Status
0.25 µ
G
SRAM
High Perf/Density
ROM
Test Chip Status
UMC
0.13 µ
HS
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
SP
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
Test Chip Status
IBM
90 nm
9SF
Specialty Memory
Test Chip Status
0.13 µ
8SF
SRAM
High Perf/Density
Register File
Specialty Memory
CAM
Test Chip Status
0.18 µ
7SF
SRAM
High Perf/Density
Register File
CAM
Test Chip Status
0.25 µ
6SF
SRAM
High Perf/Density
ROM
Test Chip Status
I/O
TSMC
45 nm
GS
Special Purpose I/O
Gen Purpose I/O
LP
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
65 nm
GP
Special Purpose I/O
Gen Purpose I/O
LP
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
90 nm
G
Special Purpose I/O
Gen Purpose I/O
GT
Special Purpose I/O
Gen Purpose I/O
LP
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.13 µ
G
Special Purpose I/O
Gen Purpose I/O
LV
Special Purpose I/O
Gen Purpose I/O
LVOD
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.15 µ
G
Special Purpose I/O
LV
Special Purpose I/O
Test Chip Status
0.18 µ
G
Special Purpose I/O
Gen Purpose I/O
LV
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.25 µ
G
Special Purpose I/O
Test Chip Status
UMC
0.13 µ
HS
Special Purpose I/O
Gen Purpose I/O
SP
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.18 µ
Logic
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.25 µ
G
Special Purpose I/O
Gen Purpose I/O
Logic
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
IBM
90 nm
9SF
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.13 µ
8SF
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
0.18 µ
7SF
Special Purpose I/O
Gen Purpose I/O
Test Chip Status
Standard Cell
TSMC
45 nm
GS
High Perf/Density
Ultra Low Power
Structured Arrays
LP
High Perf/Density
Ultra Low Power
Structured Arrays
Test Chip Status
65 nm
GP
High Perf/Density
Ultra Low Power
LP
High Perf/Density
Ultra Low Power
Test Chip Status
90 nm
G
High Perf/Density
Ultra Low Power
GT
High Perf/Density
Ultra Low Power
LP
High Perf/Density
Ultra Low Power
Test Chip Status
0.13 µ
G
High Perf/Density
Ultra Low Power
LV
High Perf/Density
Ultra Low Power
LVOD
High Perf/Density
Ultra Low Power
Test Chip Status
0.18 µ
G
High Perf/Density
Ultra Low Power
LV
High Perf/Density
Ultra Low Power
Test Chip Status
UMC
0.13 µ
HS
High Perf/Density
Ultra Low Power
SP
High Perf/Density
Ultra Low Power
Test Chip Status
IBM
90 nm
9SF
High Perf/Density
Ultra Low Power
Test Chip Status
0.13 µ
8SF
High Perf/Density
Ultra Low Power
Test Chip Status
0.18 µ
7SF
High Perf/Density
Ultra Low Power
Test Chip Status
PLL
SERDES
Available Views
s