| Standard Cell |
| Technology |
Foundry |
Process |
Description |
Design Status |
Silicon Status |
65nm
|
TSMC |
G |
- Full custom standard cell library consisting
of about 700 cell
- Single metal layer design for high routing
utilization
- 10-track layout
- High speed with high density
- Accurate timing and power models
- Complete models and views for synthesis and
functional simulation tools
|
Front End views are available under NDA
|
|
| 90nm
|
TSMC |
G GT
LP |
- Full custom standard cell library consisting
of about 700 cell
- Single metal layer design for high routing
utilization
- 10-track layout
- High speed with high density
- Accurate timing and power models
- Complete models and views for synthesis and
functional simulation tools
|
"G"
Test Chip Taped Out (Q3 2004)
"GT"
Test Chip Taped Out (Q4 2004) |
G/GT Working Silicon in Dolphin
Test-Chip
(Test-chip report is available )
|
| IBM |
9SF |
|
|
| 0.13um |
TSMC |
LV
LVOD
G |
- Full custom standard cell library consisting of about 500 cell
- Single metal layer design for high routing utilization
- 10-track layout
- High speed with high density
- Accurate timing and power models
- Complete models and views for synthesis and functional simulation tools
|

Taped Out (Nov 2002)
|
Working Silicon in Customer Design
&
LV/LVOD Working Silicon in Dolphin
Test-Chip (Test-chip
report is available)
|
| UMC |
HS SP |
|
Working Silicon In Customer Design
|
| IBM |
8SF |
|
Working Silicon In Customer Design
|
| 0.18um |
TSMC |
LV |
- Full custom standard cell library consisting of over 400 cell
- Single metal layer design for high routing utilization
- 9 track architecture
- High speed with high density
- Accurate timing and power models
- Complete models and views for synthesis and functional simulation tools
|
|
Working Silicon In Customer Design
|
| IBM |
7SF |
|
Working Silicon In Customer Design
|