In The News

IN THE NEWS

Suggest press release program going forward to announce sales wins, successful customers, technology enhancements, partnerships etc. Here is a list of some releases that could have been written in the past, for example

2008

Dec 08
LogicVision and Dolphin Technology Join Forces to Deliver Industry's Most Advanced High-Yield Embedded Memory Solution
LogicVision, Inc. (NASDAQ: LGVN), a leading provider of semiconductor built-in-self-test (BIST), built-in self-repair (BISR) and diagnostic solutions, and Dolphin Technology, Inc. a leading provider of performance-optimized SoC memory cores and performance-matched standard cell libraries and Input/Outputs (IOs), today announced that Dolphin Technology is offering an integrated high-performance and high-yield embedded memory solution that combines the best-in-class technologies from both companies. Full Article

2007

Dec 07
Silicon for the 45nm testchip comes back.

Oct 07
Dolphin Technology tapes out 45nm testchip.

20 Sept 07
Dolphin Technology announces availability of TSMC 65nm LP testchip reports.

23 July 07
Dolphin Technology announces availability of TSMC 65nm GP testchip reports.

15 Feb 07
Testchip for 65nm GP comes back from fab.

17 Jan 07
Testchip for 65nm LP comes back from fab.

2006

Oct 06
Dolphin Technology tapes out TSMC 65nm testchip.

2005

Nov 07
Dolphin Technology announces availability of PLL and SerDes in Q1 of 2006 for TSMC 90nm.

Oct 26
Dolphin Technology announces TSMC 65 nm Design Kits availability under NDA.

April 26
DOLPHIN TECHNOLOGY AND GENESYS TESTWARE DEVELOP DESIGN AND TEST FLOW FOR INCREASING YIELD AND QUALITY OF NANOMETER MEMORIES USING RAMpiler+™ AND ARRAYTESTMAKER™.
Dolphin Technology, a leading provider of semiconductor intellectual property (IP), and Genesys Testware, Inc., a leading supplier of yield, quality and cost improvement tools for nanometer IC announced today that they have jointly developed a design and test flow for improving yield and quality of nanometer memories using RAMpiler+ memories with ArraytestMaker repair. A detailed application note that describes this design and test flow is available for free download from the web sites for both Dolphin Technology (www.dolphin-ic.com) and Genesys Testware (www.genesystest.com). Printed copies of this application note that focus on memories at the TSMC 90nm process node, will be available at the Dolphin Technology booth during the 2005 TSMC US Technology Symposium being held at the San Jose Convention Center. This application note helps IC designers using Dolphin memory compilers to reduce unit IC cost without additional investment. Full Article

April 11
Dolphin Technology Endorses Magma's Advanced Memory BIST Solution within Blast DFT.
Blast DFT complements Dolphin's advanced memory technology for demonstrably significant yield gains and ease of integration.Magma (R) Design Automation Inc. (Nasdaq: LAVA), a provider of semiconductor design software, and Dolphin Technology, a leading provider of high-performance semiconductor intellectual property (SIP) blocks, announced today that Dolphin is endorsing the MBIST (memory built-in self-test) solution within Magma's Blast DFT(TM). The combination of Dolphin's advanced memory IP and Magma's MBIST provide a complete memory test solution. MBIST's Built-in Repair Analysis for Dolphin's multi-dimensional redundancy schemes enables high yields without incurring additional test-time penalties. The comprehensive memory test algorithms, along with the at-speed test application, ensure high quality. Dolphin's memory IP and Magma's Blast DFT's automated integrated solution provides quick-turnaround time and repeatability for complex SoC (system-on-chip) designs.Full Article

2004

Oct 18
HyperTransport™ Consortium Announces Suite of HyperTransport 2.0 Devices from AMD, Agilent, Credence, Dolphin, FuturePlus, GDA, SiS, ULi, and VIA announced today that the first wave of HyperTransport Specification 2.0 compliant devices are now available from a number of member companies.
HyperTransport Specification 2.0 defines performance levels of up to 2.8 Gigatransfers/second and mapping to PCI Express. The new products include HyperTransport-enabled 64-bit processors, I/O chipsets, silicon IP, and development tools. The arrival of products conforming to HyperTransport Specification 2.0, which supports up to 22.4 Gigabytes/second aggregate bandwidth, is an important milestone, marking the fastest industry adoption of a new
HyperTransport technology specification. Full Article

Sep 15
Dolphin Technology's TSMC 90nm Testchip Silicon and Report will be Available Q1/05

Dolphin's TSMC 90nm G/GT Testchip Silicon is Taped out. Functional report will be available Q1/05 on customer's request under NDA.

May 18
Dolphin Technology Endorses Legend Design’s MSIM Circuit Simulator for Signal Integrity Analysis of High-Speed IO Circuits

Dolphin Technology, Inc., a leading provider of high-performance Semiconductor Intellectual Property (SIP) blocks and Legend Design Technology, Inc., a leading provider of characterization and simulation software for SoC designs, today announced that Dolphin Technology successfully validated Legend’s circuit simulator MSIM for signal integrity analysis of high-speed IO circuits, and timing and power characterization of standard/IO cell library for deep sub-micron and nanometer technology. Full Article

Feb 11
90 nm Stdcell / IO / Memory Frontend and Backend Views are Available for TSMC 90G and IBM 9SF

Feb 5
Dolphin Technology's 2+ Gb/s Hypertransport Phy
Dolphin Technology announces the availability of 2+Gb/s Hypertransport Phy in 0.13um Technology

Dolphin Technology's HyperTransport PHY IP core provides a proven high-speed HyperTransport physical interface circuit for implementation into custom ASIC or ASSP devices. Dophin HyperTransport Rx/Tx I/O macros now support 1.2 GHz clock rates, HyperTransport 2.0 specifications and provide for bandwidth of up to 2.0 Gigabits/second. Link..

2003

Nov 11
First 90 nm IP delivered to customer for TO

July 28
Dolphin Technology and Legend Design Enable Automatic Instance Based Memory Characterization In Near Real Time
Dolphin Technology and Legend Design today announced that Legend’s CharFlo-Memory! offers instance characterization and verification for Dolphin’s memory compilers. Full Article

June 11
Dolphin Technology's IBM 8SF Memory and IO Products are Functional in Customer's Silicon
Dolphin's memory and IO products are functional in several customer's chips.

May 28
Ultra Low Power Semiconductor IP Products will be added to Dolphin's Standard Product Offerings
Dolphin technology announces the addition of Ultra Low Power Memory and Standard Cell products to its comprehensive list of semiconductor/physical IP.

Feb 17
Dolphin Technology's TSMC 0.13um Testchip Silicon and Report will be Available Soon
Dolphin's TSMC 0.13 LV/LVOD Testchip Silicon is back. Functional report is available on customer's request under NDA. Please feel free to Contact Us for further information.

2002

July 11
Dolphin Technology 0.13-micron Library Added to Growing List of Libraries Pre-qualified for Magma Flow
Dolphin's Semiconduction Intellectual Property blocks that include embedded memeory and memory compiler products, high performance and standard IOs and high-performance standard cell libraries, is the most recent partner to benefit from Magma's library qualification process. Dolphin's 0.13-micron library targeted to a leading foundry process is available now. Full Article

June 18
Dolphin Technology gets supplier award from AMCC two years in a row
Dolphin's outstanding performance in providing customer with top quality products has once again been recognized by customers. Dolphin receive supplier award from AMCC in the category of "Total Cost of Ownership".

April 22
LogicVision and Dolphin Technology Partner on Embedded Test
Dolphin's performance memory cores and standard cell library will become the standard design elements in LogicVision's IP training and tutorial material. Full Article

2001

November 15
Working Silicon for HyperTransport^® PHY
Dolphin Technology' HyperTransport^® (formerly known as LDT) PHY is silicon proven in TSMC 0.13LV, TSMC 0.15LV, TSMC 0.13LV-OD and UMC 0.18. The PHY is robustly functional @ 1.6Gbs in UMC 0.18 technology.

November 15
Dolphin moves to it's new location
Dolphin Technology has moved to it's new headquarters close to the San Jose airport on Gateway Place. Please update your database with the new address and phone numbers.

November 1
Working Silicon for UMC 0.13um HS process
Dolphin Technology 's RAMpiler+^® memory blocks with redundancy are functional in customer's silicon.

September 10
Support for IBM 8SF process
Dolphin Technology adds IBM fab support for 8SF process to its IP portfolio providing yet another complete library solution for its valued customers.

July 23
Support for UMC 0.13um HS process
Dolphin Technology adds to its library offerings geared for UMC 0.13um HS process.

June 18
Support for TSMC 0.13um LV process
Dolphin Technology develops a complete set of libraries geared toward TSMC 0.13um LV process.

June 25
Dolphin Technology gets supplier award from AMCC
Dolphin's outstanding performance in providing customer with top quality products has once again been recognized by customers. Dolphin receives supplier award in the category of "Speed" this year.

award2001.jpg (28335 bytes)

Dolphin Technology and Genesys Testware announce the first memory compiler to offer Dynamic Soft Repair capability
Dolphin Technology, Inc. and custom memory,and Genesys Testware, Inc. announced today the first commercially available memory compiler to provide dynamic soft repair technology to improve the yield of large embedded memory. Full Article

May 16
AMD announces Dolphin Technology Support of Next-Generation HyperTransport^® Bus
AMD disclosed that it has been working with Dolphin Technology to develop HyperTransport^® physical interfaces or "PHYs" Full Article

2000

Support for IBM 7SF process - Dolphin Technology adds IBM fab support for 7SF process to its IP portfolio providing the first complete library solution for its valued customers.

Support for TSMC 0.18um process
Dolphin Technology develops libraries geared toward TSMC 0.18um process.

Support for UMC 0.18um process
Dolphin Technology adds to its library offerings geared for UMC 0.18um process.

1998-99

Support for UMC 0.25um process - Dolphin Technology adds to its I/O offerings geared for UMC 0.25um process.

1997-98

Support for TSMC 0.25um process - Dolphin Technology signs an agreement to develop custom I/O and memory for a major customer geared toward TSMC 0.25um process.

1996

First customer design - Dolphin Technology Debuts First customer design using our I/O library.

1995

Founded - Dolphin Technology founded on a mission to empower silicon-IP and design re-use!

SHOWS:

TSMC Symposium 2002
UMC Symposium 2001
ISQED 2001
IP/SOC Conference 2001
DAC
EOS/ESD Symposium
Contact Dolphin Technology Public Relations for more information.